There are security contexts in which a number or key that is unique to a particular microprocessor part is needed. One solution has been to manufacture a unique serial number into each part. However, serial numbers are very predictable since they are structured and repetitive. This high predictability is not good in many security contexts.
U.S. Pat. Nos. 5,790,783, 5,790,663, and 5,774,544 to Lee, et al. describe a method and apparatus for encrypting and decrypting a microprocessor serial number. Lee, et al. teaches an integrated circuit package that includes a CPU die and an NVRAM die that are coupled together by a serial interface. The manufacturer populates an MSR with the desired serial number for the CPU and populates two other MSRs with two different keys. The CPU subsequently encrypts the serial number using the first key, and then encrypts the encrypted serial number and first key with the second key according to an encryption algorithm. The CPU then writes the double-encrypted serial number to the NVRAM including a CRC value.
Additionally, Lee, et al. teaches that the manufacturer populates an MSR with the second key. The CPU subsequently reads the double-encrypted serial number from the NVRAM (checking the CRC value), decrypts it using the second key to obtain the singly-encrypted serial number and first key, decrypts the singly-encrypted serial number using the decrypted first key to obtain the decrypted serial number, and stores the decrypted serial number in an MSR. The writing of the serial number to NVRAM and the reading of the serial number from the NVRAM can only be performed when the processor is unlocked, which occurs when the processor detects that the NVRAM is zeroed out or when the manufacturer populates MSRs with the current processor serial number and the two keys that were used to create the serial number and the serial numbers match.
Lee, et al. further teaches an API that allows serialized software (i.e., software that is linked to a processor's serial number such that the software will not be able to run on a processor with another serial number, such as when a processor is upgraded) to read the CPU serial number from the NVRAM by populating an MSR with the second key. The second key is also stored in system CMOS. The API also provides a function that allows serialized software to read the CPU serial number that was most recently stored by the system (presumably in CMOS or on disk). If the two values match, the serialized software may continue to run. Otherwise, the serialized software assumes the user upgraded the CPU to a new CPU with a new serial number and calls another API function that requests authorization to run on the new CPU. If authorization is permitted, then the serialized software performs a software lock using the new CPU serial number. Otherwise, the serialized software does not run, or else runs in a limited capacity.
The method of Lee, et al. has some deficiencies. First, although Lee, et al. states the two encryption keys and the encryption algorithm are only known by the manufacturer (col. 4, lines 24-26), he acknowledges that a potential gap in his method is that the two keys are stored in MSRs (col. 6, lines 30-32), which can be read by users. Furthermore, the second key is stored in system CMOS. Thus, Lee, et al. concludes: “While the above system and method does not provide complete protection against unauthorized access to the key or serial number, the casual user will not be able to gain unauthorized access.” Although Lee, et al. uses two separate encryption keys, they are only 32-bits each, which are not very secure for many applications. Finally, only one of the two encryption keys is needed to read the serial number.